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95 results

RTL Engineering
x86 Decoding Simulation in the Pentium P5

Chapters have been marked, feel free to go directly to the simulation, skipping the intro and explanation. A supplementary video ...

5:55
x86 Decoding Simulation in the Pentium P5

1,049 views

3 years ago

RTL Engineering
x86 Decoding Simulation in the 486

Chapters have been marked, feel free to go directly to the simulation, skipping the intro and explanation. A supplementary video ...

4:13
x86 Decoding Simulation in the 486

1,081 views

3 years ago

OpenSecurityTraining2
Intel Processor Execution Modes

You can watch this class without ads and with quizzes and lab setup instructions by going to https://ost2.fyi/Arch2001.

8:17
Intel Processor Execution Modes

3,183 views

3 years ago

RTL Engineering
x86 Front End Complexity (Part 1 - Pentium P5)

The first part of a longer video talking about the complications introduced by the x86 instructions set as it relates to front end ...

24:03
x86 Front End Complexity (Part 1 - Pentium P5)

4,708 views

3 years ago

ITFreeTraining
CPU Architecture - CompTIA A+ 220-1101 – 2.11

Let's have a look at CPU architecture. Download PowerPoint: https://itfreetraining.com/handouts/ap11/2d05.pptx What Is CPU ...

26:43
CPU Architecture - CompTIA A+ 220-1101 – 2.11

2,015 views

10 months ago

RTL Engineering
MicroOps in the Pentium MMX

A Short video talking about how the Pentium P5 and Pentium MMX used micro-operations compared with more traditional ...

13:57
MicroOps in the Pentium MMX

1,234 views

3 years ago

Jookia
Programming a DOS Twitch Bot: Part 14 (Packet handling)

It's time to handle our packets. With assembly. This video contains adult language and humor. Streamed on 2021-10-23 See more ...

2:50:00
Programming a DOS Twitch Bot: Part 14 (Packet handling)

31 views

4 years ago

NPTEL IIT Bombay
Lecture 15: Microprocessor Memory and Addressing

Week 4: Lecture 15: Microprocessor Memory and Addressing.

33:44
Lecture 15: Microprocessor Memory and Addressing

1,152 views

4 years ago

NPTEL IIT Bombay
Lecture13: Microprocessor Building Blocks I- Combinational Circuits

Week 4: Lecture13: Microprocessor Building Blocks I- Combinational Circuits.

31:04
Lecture13: Microprocessor Building Blocks I- Combinational Circuits

2,128 views

4 years ago

OpenSecurityTraining2
Register Conventions - Architecture 1001: x86-64 Assembly

You can watch this class without ads and with extra learning games, quizzes, and lab setup instructions by going to ...

1:56
Register Conventions - Architecture 1001: x86-64 Assembly

7,064 views

3 years ago

OpenSecurityTraining2
Global Descriptor Table (GDT) & Local Descriptor Table (LDT) 1 - Global Descriptor Table Register

You can watch this class without ads and with quizzes and lab setup instructions by going to https://ost2.fyi/Arch2001.

2:53
Global Descriptor Table (GDT) & Local Descriptor Table (LDT) 1 - Global Descriptor Table Register

7,308 views

3 years ago

OpenSecurityTraining2
Arch4001 Intel Firmware Attack & Defense: 01 Reset Vector 01 Intro 05 Real Mode Segmentation

View the full free MOOC at https://ost2.fyi/Arch4001. This course will be an advanced Intel architecture and firmware security class ...

3:35
Arch4001 Intel Firmware Attack & Defense: 01 Reset Vector 01 Intro 05 Real Mode Segmentation

748 views

1 year ago

NPTEL IIT Bombay
Lecture 16: Timing and control unit: Primitive Microprocessor

Week 4: Lecture 16: Timing and control unit: Primitive Microprocessor.

42:35
Lecture 16: Timing and control unit: Primitive Microprocessor

1,091 views

4 years ago

OpenSecurityTraining2
Paging - Paging and the Control Registers

You can watch this class without ads and with quizzes and lab setup instructions by going to https://ost2.fyi/Arch2001.

7:43
Paging - Paging and the Control Registers

821 views

3 years ago

OpenSecurityTraining2
Read The Fun (Intel Software Development) Manual! - Architecture 1001: x86-64 Assembly

You can watch this class without ads and with extra learning games, quizzes, and lab setup instructions by going to ...

36:31
Read The Fun (Intel Software Development) Manual! - Architecture 1001: x86-64 Assembly

1,656 views

3 years ago

J David Eisenberg
Chapter 5: Using a while to get input

Use a *while* loop to repeatedly get input in a program.

3:21
Chapter 5: Using a while to get input

313 views

6 years ago

wikipedia tts
Intel 80386SX | Wikipedia audio article

This is an audio version of the Wikipedia Article: https://en.wikipedia.org/wiki/Intel_80386 00:03:09 1 Architecture 00:06:08 1.1 ...

29:42
Intel 80386SX | Wikipedia audio article

77 views

7 years ago

OpenSecurityTraining2
Interrupts - Interrupt Descriptors - What Did We Learn?

You can watch this class without ads and with quizzes and lab setup instructions by going to https://ost2.fyi/Arch2001.

1:05
Interrupts - Interrupt Descriptors - What Did We Learn?

618 views

3 years ago

OpenSecurityTraining2
Model Specific Registers

You can watch this class without ads and with quizzes and lab setup instructions by going to https://ost2.fyi/Arch2001.

11:03
Model Specific Registers

2,220 views

3 years ago

DEFCONConference
DEF CON 31 - Backdoor in the Core - Altering Intel x86 Instruction Set at Runtime -  Krog, Skovsende

In this work, we present the novel results of our research on Intel CPU microcode. Building upon prior research on Intel Goldmont ...

36:42
DEF CON 31 - Backdoor in the Core - Altering Intel x86 Instruction Set at Runtime - Krog, Skovsende

10,638 views

2 years ago